Akul Mallayya Swami

Independent Researcher and Safety-Critical Embedded Systems Engineer working on runtime assurance, timing trustworthiness, and deployment validation for edge AI systems.

Runtime Assurance Trustworthy Edge AI Timing Validation Safety-Critical Software IEC 62304 · ISO 14971
iD 0009-0003-9549-5543
GitHub
2Industry publications
4Research preprints
OpenCode and data artifacts
IEEEPeer-review service

About

Akul Mallayya Swami is an independent researcher and safety-critical embedded systems engineer studying the temporal reliability of edge AI systems operating under real-world deployment interference.

His work examines a failure mode that conventional accuracy testing can miss: an AI system may continue producing statistically correct outputs while becoming too slow or temporally unstable to satisfy its deployment requirements.

His research combines hardware-referenced timing measurements, controlled resource-contention experiments, and reproducible validation protocols across embedded AI platforms including the NVIDIA Jetson Orin Nano, Raspberry Pi, and Coral-class systems.

Research thesis: timing trustworthiness is a deployment-assurance property distinct from statistical accuracy and should be validated explicitly.

Current Research

TFS Guard
Deadline-aware runtime timing-fidelity monitoring

TFS Guard investigates how deployed edge AI systems can preserve functional output correctness while violating timing assumptions under runtime interference. The work focuses on late-correct failures, deadline violations, tail-latency behavior, and externally validated runtime observability.

Edge AI Deployment Assurance
Jetson Orin Nano · Coral Dev Board Micro · Saleae timing reference

Comparative experiments examine shared Linux inference environments and more isolated embedded inference paths to determine how platform architecture, workload contention, and measurement boundaries affect temporal reliability.

Research Interests

Runtime assurance for deployed edge AI and edge ML systems
Timing trustworthiness, deadline compliance, and temporal reliability
Hardware-referenced latency analysis and external timing calibration
Interference-aware deployment validation methodologies
Safety-critical embedded software verification and fault analysis
Standards-aligned software assurance under IEC 62304 and ISO 14971

Publications

Industry Publications

The Embedded Edit · Industry Publication July 2026
Uniform Validation Tolerances for Edge ML Platforms
Akul Mallayya Swami, Nikhil Chougule

A platform-aware examination of GPIO instrumentation overhead and cross-platform timing bias in edge ML validation, with hardware-referenced measurements spanning NVIDIA Jetson and Raspberry Pi deployments.

Read article Related preprint
Embedded Computing Design · Industry Publication June 2026
When Correct Outputs Aren't Enough: Testing Edge AI for Hidden Timing Failures on Shared Silicon
Akul Mallayya Swami

A controlled same-hardware study showing that an edge AI workload can preserve output behavior while violating deployment timing expectations under shared-system contention, motivating joint validation of correctness and tail latency.

Read article Related preprint Protocol

Research Manuscripts and Preprints

arXiv Preprint · Submitted to IEEE Sensors Letters June 2026
Wire-Level Interrupt-to-Decision Latency of On-Sensor MLC versus Host Inference on the NVIDIA Jetson Orin Nano: A Pre-Registered Measurement Study
Akul Mallayya Swami, Dnyaneshwar Sonawane
arXiv:2606.00524 DOI Code and data
arXiv Preprint · Workshop Manuscript May 2026
Architecture-Dependent Temporal Observability Under Deployment Interference in Edge Inference Systems
Akul Mallayya Swami, Nikhil Chougule
arXiv:2605.17701 DOI
arXiv Preprint · Submitted to IEEE SMC May 2026
Per-Platform GPIO Overhead in Hardware-Validated Edge ML Inference Timing
Akul Mallayya Swami, Nikhil Chougule
arXiv:2605.02835 DOI
arXiv Preprint · Submitted to IEEE Embedded Systems Letters April 2026
Architectural Isolation as a Timing Safety Primitive for Edge AI Medical Devices: Controlled Experimental Evidence on a Shared-Silicon Platform
Akul Mallayya Swami
arXiv:2604.23831 DOI Protocol

Submission-status labels should be updated whenever a venue issues a final decision.

Open Research Infrastructure

Reproducibility Artifacts
Public repositories

Experiment protocols, timing logs, analysis scripts, hardware-calibration notes, and reproducible edge AI timing evaluations are published alongside selected manuscripts.

Research Profile
ORCID and GitHub

Research outputs, source code, datasets, and manuscript metadata are maintained through public repositories and an ORCID-linked research identity.

Experience

Safety-Critical Medical Device Systems
Embedded software engineering for FDA-regulated medical-device environments
Work involving runtime reliability, verification workflows, fault analysis, risk management, and standards-aligned development practices for high-reliability software systems.
Current
Embedded AI and Edge Systems
Deployment timing validation and runtime observability
Research and development involving embedded inference systems, hardware-referenced timing analysis, interference-aware execution, and runtime monitoring of deployed edge AI workloads.
Low-Power and Wireless Embedded Systems
Resource-constrained device software and connected embedded platforms
Experience with ultra-low-power systems, wireless communication, embedded firmware, and constrained edge architectures.

Education

Master of Science
Computer Engineering
University of Massachusetts Lowell · 2017
Bachelor of Science
Electronics and Telecommunication Engineering
University of Pune · 2015

Standards and Technical Focus

IEC 62304
ISO 14971 Risk Management
Software as a Medical Device
Safety-Critical Embedded Software
Runtime Monitoring
Hardware-Referenced Timing